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专利名称：Method to partition the physical design of
an integrated circuit for electrical simulation
发明人：Gary S. Ditlow,Daria R. Dooling,Richard L.
Moore,David E. Moran,Thomas W.Wilkins,Ralph J. Williams
申请号：US09371202申请日：19990810公开号：US06601025B1公开日：20030729
专利附图：
摘要：A method is provided for designing an integrated circuit that includes receiving
a graphical description of the integrated circuit, extracting shapes relating to a specificcircuit function from the graphical description of the integrated circuit, and partitioningthe extracted shapes into a plurality of segments. The method may form an electricalrepresentation of the integrated circuit for each of the plurality of segments and solve amatrix equation (Gv=i) for each of the plurality of segments based on the electricalrepresentation.
申请人：INTERNATIONAL BUSINESS MACHINES CORPORATION
代理机构：McGinn & Gibb, PLLC
代理人：Richard M. Kotulak, Esq.
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