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专利名称:INTERCONNECTING BIT LINES IN MEMORY
DEVICES FOR MULTIPLEXING
发明人:Seiichi Aritome申请号:US13154559申请日:20110607
公开号:US20110233686A1公开日:20110929
专利附图:
摘要:An embodiment of a memory device has a plurality of conductive plugs formedon a semiconductor substrate and a pair of successively adjacent first and second bit linesoverlying and in contact with each of the conductive plugs.
申请人:Seiichi Aritome
地址:Boise ID US
国籍:US
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