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专利名称：Memory subsystem including memory
modules having multiple banks
发明人：Drew G. Doblar,Chung-Hsiao R. Wu申请号：US10328682申请日：20021223
公开号：US20040123016A1公开日：20040624
专利附图：
摘要：A memory subsystem including memory modules having multiple banks. Amemory subsystem includes a memory controller and a plurality of memory modules.The plurality of memory modules may be coupled to the memory controller by a
memory interconnect having a data path including a plurality of data bits. Each of theplurality of memory modules includes a circuit board and a plurality of memory chipsmounted to the circuit board. The circuit board includes a connector edge for connectionto the memory interconnect. Each of the plurality of memory chips may be configured tostore data in a plurality of storage locations. Each of the plurality of memory modulesmay be coupled to a respective mutually exclusive subset of the plurality of data bits.
申请人：DOBLAR DREW G.,WU CHUNG-HSIAO R.
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