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专利名称：Adjustable delay circuit发明人：Dobos, Laszlo Janos申请号：EP88117329.8申请日：19881018公开号：EP0317759A2公开日：190531
专利附图：
摘要：A delay element for producing an output signal in response to a change in stateof an input signal includes variable gain first and second amplifiers (A1, A2) and a delaybuffer (12) having a fixed delay. The input signal is applied as input to the first amplifier(A1) and the delay buffer (12) while the output of the delay buffer (12) is applied as input
to the second amplifier (A2). The outputs of the first and second amplifiers are summedto provide the output signal. When the gain of the first amplifier (A1) is high and the gainof the second amplifier is low, the output signal will respond to the change in state of theinput signal with minimum delay. When the gain of the first amplifier (A1) is low and thegain of the second amplifier (A2) is high, the output signal will respond to the change instate of the input signal with maximum delay. The delay in change of state of the outputsignal in response to a change of state in the input signal may be adjusted with highresolution to a time intermediate between the minimum and maximum delays byadjusting the gains of the first (A1) and second (A2) amplifiers.
申请人：TEKTRONIX, INC.
地址：Corporate Headquarters, 26600 S.W. Parkway Wilsonville, Oregon 97070-1000US
国籍：US
代理机构：Liska, Horst, Dr.-Ing.
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