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专利名称：Method and apparatus for calibrating
internal pulses in an integrated circuit
发明人：Rajiv V. Joshi,Robert L. Franch,Robert
Maurice Houle,Kevin A. Batson
申请号：US11761610申请日：20070612公开号：US07973549B2公开日：20110705
专利附图：
摘要：A method and circuit for measuring internal pulses includes an enable circuitconfigured to receive a control signal from an on-chip built-in tester to enable
measurement of internal circuits. A delay chain is configured to receive a pulse signalfrom an on-chip circuit component. Sampling latches each include a data input coupledbetween adjacent delay elements of the delay chain and synchronized with the clocksignal such that a transition in the pulse signal is indicated by comparing adjacent digitalvalues in an output sequence.
申请人：Rajiv V. Joshi,Robert L. Franch,Robert Maurice Houle,Kevin A. Batson
地址：Yorktown Heights NY US,Wappingers Falls NY US,Williston VT US,Williston VTUS
国籍：US,US,US,US
代理机构：Tutunjian & Bitetto, PC
代理人：Brian P. Verminski, Esq.
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