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专利名称：System and method for reducing power
consumption in high frequency clockedcircuits
发明人：Christopher McCall Durham,Peter Juergen
Klim
申请号：US08/702405申请日：19960814公开号：US05761517A公开日：19980602
摘要：A system and method are provided which automatically change the output of anoscillator clock prior to its input to dynamic logic circuit elements as a system clocksignal. The oscillator clock signal is controlled based upon a signal generated by a sensorwhich determines the power consumption of the integrated circuit. The frequency of theclocked signal is reduced (or increased) incrementally based upon the output of thesensor which detects the level of a specific circuit characteristic, relating to electricalpower consumption. A pattern generator is used to input a digital signal to a series ofinterconnected registers which make up a loadable shift register. The output of thepattern generator is based upon the input from the sensor. The bits shifted through theshift register are ANDed with the oscillator clock signal to control the frequency of thesystem clock.
申请人：INTERNATIONAL BUSINESS MACHINES CORPORATION
代理人：Mark E. McBurney,Casimer K. Salys
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